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AN07-00180-3E
Table 4-4 Description of the output compare registers and setting values
Register name
CPCLRB0
OCCPB0
OCCPB1
OCCPB2
OCCPB3
OCCPB4
OCCPB5
OCMOD
OCSH1,3,5_BTS1
OCSH1,3,5_BTS0
OCSH1,3,5_CMOD
OCSH1,3,5_OTE1
OCSH1,3,5_OTE0
OCSH1,3,5_OTD1
OCSH1,3,5_OTD0
OCSL0,2,4_IOP1
OCSL0,2,4_IOP0
Setting value [function]
1599
1598
1000
1598
1000
1598
1000
0xFF [1 output on a match]
1 [transfer on a compare clear
match]
1 [transfer on a compare clear
match]
1 [ inversion mode]
0 [general-purpose output port]
0 [general-purpose output port]
0 [1 output]
0 [1 output]
0 [bit clear]
0 [bit clear]
Description
Compare value setting
Output compare value settings
Designation of the operation on a compare
match
Buffer transfer select bit (ch 1,3,5)
buffer transfer select bit (ch 0,2,4)
Output level inversion mode bit
Output enable bit (ch 1,3,5)
Output enable bit (ch 0,2,4)
Output level bit (ch 1,3,5)
Output level bit (ch 0,2,4)
Compare match interrupt flag bit (ch 1,3,5)
Compare match interrupt flag bit (ch 0,2,4)
OCSL0,2,4_IOE1
0
[compare
match
interrupt
Compare match interrupt enable bit (ch 1,3,5)
disable]
OCSL0,2,4_IOE0
0
[compare
match
interrupt
Compare match interrupt enable bit (ch 0,2,4)
disable]
OCSL0,2,4_BUF1
OCSL0,2,4_BUF0
OCSL0,2,4_CST1
OCSL0,2,4_CST0
0 [compare buffer enable]
0 [compare buffer enable]
0 [compare operation disable]
1 [compare operation enable]
- 72 -
Compare buffer disable bit (ch 1,3,5)
Compare buffer disable bit (ch 0,2,4)
Compare operation enable bit (ch 1,3,5)
Compare operation enable bit (ch 0,2,4)
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